top Project Status (09/26/2010 - 15:44:52) | |||
Project File: | template.xise | Parser Errors: | No Errors |
Module Name: | top | Implementation State: | Fitted |
Target Device: | xc2c256-7TQ144 |
|
No Errors |
Product Version: | ISE 12.2 |
|
No Warnings |
Design Goal: | Balanced |
|
|
Design Strategy: | Xilinx Default (unlocked) |
|
|
Environment: | System Settings |
|
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | So 26. Sep 16:02:01 2010 | 0 | 0 | 0 | |
Translation Report | Current | So 26. Sep 16:02:08 2010 | 0 | 0 | 0 | |
CPLD Fitter Report (Text) | Current | So 26. Sep 16:02:11 2010 | 0 | 1 Warning (1 new) | 0 | |
Power Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
Post-Fit Simulation Model Report |